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Reference:BH-1996-7
Sector:Electronics
Salary:£70,000 to £900,000 Per Annum
Benefits:Stock options 25 days Hybrid Relocation assistance Visa sponsorship
Town/City:Paignton
Contract Type:Permanent
Senior Hardware Design Engineer | Paignton | Hybrid | £70,000-£90,000 | Lucrative Stock Options
We are working with a disruptive Computer Networking company who are working on the cutting edge of AI and Machine learning technology with applications for increased productivity in Data Centre’s and HPCs.
They are looking for Senior Hardware Design Engineers with strong High-Speed networking experience to join them in their mission to revolutionise AI systems whilst reducing energy consumption and striving for a sustainable future.
Key responsibilities:
We are working with a disruptive Computer Networking company who are working on the cutting edge of AI and Machine learning technology with applications for increased productivity in Data Centre’s and HPCs.
They are looking for Senior Hardware Design Engineers with strong High-Speed networking experience to join them in their mission to revolutionise AI systems whilst reducing energy consumption and striving for a sustainable future.
Key responsibilities:
- Design high-speed digital and mixed-signal systems, including interfaces like 56GBd PAM4 transceivers, signal integrity management, and power supply design.
- Develop DAC/ADC peripherals utilising QSPI, DSPI, and SPI interfaces.
- Lead FPGA hardware design focusing on Intel (Altera) Cyclone V/Agilex 7 platforms, including memory interfaces and clocking architecture.
- Design and layout schematics and PCBs using Mentor Graphics PADs Professional, ensuring compliance with RF signal design up to 70GHz bandwidth.
- Implement thermal management solutions and optimise phase lock loops and oscillators for stable system performance.
- High-speed digital/mixed-signal design, with specific expertise in transceivers, analogue electronics, and DAC/ADC peripherals. FPGA hardware design skills (preferably Intel), and schematic capture using Mentor Graphics PADs.
- Memory interfaces, RF signal design, clock domain crossing, and signal integrity. Practical debugging and test skills with hands-on experience.
- VHDL (preferred) or System Verilog for FPGA development, with experience using Quartus and QuestaSim tools. Python or C# scripting for test kit control is advantageous.
- Strong communication and collaboration abilities with a humble, team-oriented attitude.
- Excellent Salary
- Lucrative stock options.
- 25 days holiday + bank holidays.
- Hybrid working.
- Relocation assistance.
- Visa sponsorship provided.
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