Reference:BH-2365
Sector:Electronics, Photonics / Opto
Salary:€40,000 to €50,000 Per Annum
Benefits:0
Town/City:Aveiro
Contract Type:Permanent
Digital IC / ASIC / EIC Engineer (Onsite – Portugal)
Location: Aveiro District, Portugal (Onsite)
Salary: €40,000 – €50,000 (flexible for exceptional candidates)
Experience Level: Mid-level
About the Opportunity
We are partnering with an innovative semiconductor and hardware technology company at the forefront of advanced integrated circuit design. They are seeking a Digital IC / ASIC / EIC Engineer to join their growing engineering team, working on cutting-edge chip development projects across a range of industries.
This is a fantastic opportunity to contribute to complex ASIC and SoC programs within a highly collaborative, technically driven environment.
Key Responsibilities
Location: Aveiro District, Portugal (Onsite)
Salary: €40,000 – €50,000 (flexible for exceptional candidates)
Experience Level: Mid-level
About the Opportunity
We are partnering with an innovative semiconductor and hardware technology company at the forefront of advanced integrated circuit design. They are seeking a Digital IC / ASIC / EIC Engineer to join their growing engineering team, working on cutting-edge chip development projects across a range of industries.
This is a fantastic opportunity to contribute to complex ASIC and SoC programs within a highly collaborative, technically driven environment.
Key Responsibilities
- Design and develop digital circuits for ASIC / SoC platforms
- Define and implement RTL architecture and micro-architecture (Verilog / SystemVerilog / VHDL)
- Deliver block-level and top-level designs, including datapath, control logic, interfaces, and peripherals
- Perform RTL simulations and validation
- Carry out gate-level synthesis, including:
- Static Timing Analysis (STA)
- Constraint definition and validation
- Conduct Lint analysis and Logic Equivalence Checking (LEC)
- Support low-power design and optimisation strategies
- Collaborate closely with verification and physical design teams across ASIC programs
- Experience in digital IC, ASIC, or SoC design
- RTL design (Verilog / SystemVerilog / VHDL)
- ASIC design flow and methodologies
- Synthesis, timing analysis, and constraint management
- Debugging and verification processes
- Familiarity with EDA toolchains (Cadence, Synopsys, or Mentor Graphics)
- Hardware Description Languages: SystemVerilog, Verilog, VHDL
- Scripting: Python, TCL, Perl
- Tools & Environment:
- Cadence / Synopsys / Mentor (front-end flow)
- Git, Linux, scripting environments
- Knowledge of Design for Test (DfT)
- Experience with low-power design techniques
- Work on advanced semiconductor technologies
- Join a highly skilled and collaborative engineering team
- Clear opportunity to grow within complex ASIC development programmes